On the (80x86) processor, there is only one interrupt request line (INTR). Between the processor and the programmable interrupt controller (8259 or just PIC), there is a simple protocol to determine which interrupt handler to be invoked to service an interrupt.
Device
8259
CPU Interrupt
Handler
| (IRQ# interrupt)|
|
|
+---------------->|
INTR |
|
|
+----------------->|
|
|
| INTA
|
|
|
|<-----------------+
|
|
| INT #
|
|
|
+----------------->|
|
|
|
| invoke the handler |
|
|
+-------------------->|
|
|
| service the device |
|<---------------------------------------------------------+
|
|
| end of interrupt |
|
|<---------------------------------------+
|
|
| return from handler |
|
|
|<--------------------+
|
|
|
|
When an interrupt is generated by a device, it goes to the PIC. Multiple interrupts may be generated simultaneously. But, they are all buffered by the PIC. It is the PIC that decides which one of these interrupts should be forwarded to the CPU. To inform the CPU that an outstanding interrupt is waiting to be processed, the PIC sends an interrupt request (INTR) to the CPU, which then, at the appropriate time, responds with an interrupt acknowledgment (INTA). At this time, PIC will put an 8-bit interrupt type number associated with the device on the bus so that the CPU can identify which interrupt handler to invoke. (See below.) In the case when several interrupts are pending, PIC will send next interrupt request to the CPU only after it receives an end of interrupt command from the current interrupt handler.
On the IBM-PC/AT, there are two PICs. Hence, it can support up to 16 devices, IRQ-0 to IRQ-15. For each IRQ#, an interrupt type number must be preprogrammed on the PIC so that when a device generates an interrupt the associated interrupt type number will be put on the bus. The following is a list of standard IBM-PC interrupt type numbers for typical devices:
Device
IRQ # Interrupt Type Number
---------------------------------------
------ ---------------------
Programmable Interval Timer
0 08H
Keyboard
1 09H
Cascading to the second PICs
2 (reserved)
Serial Communication Port (COM2)
3 0BH
Serial Communication Port (COM1)
4 0CH
Fixed Disk Controller
5 0DH
Floppy Disk Controller
6 0EH
Parallel Printer Controller
7 0FH
When the CPU receives an interrupt type number from the PIC, it uses this number to look up the corresponding interrupt vector in memory. There are 256 interrupt types. Each interrupt vector occupies 4 bytes. Therefore, a total of 4 x 256 = 1K bytes of memory is reserved at the beginning of the processor memory address space for storing interrupt vectors. The above well-known interrupt type numbers are predefined by IBM for the original IBM-PC. We could redefine all interrupt type numbers since PIC is programmable. But, we won't! We shall leave it to the BIOS to program these interrupt type numbers at boot time.
Every address on a 80x86 processor is expressed in terms of a segment based and an offset, e.g., CS:IP where CS is the code segment register and IP is the instruction pointer. On a 16-bit processor, both CS and IP are 16-bit. Hence, every address occupies 4 bytes. The interrupt vector for interrupt number 08H is at 0000H:(08H * 4) = 0000H:0020H, i.e., CS = 0000H and IP = 0020H. CS is always 0000H because the interrupt vector table always occupies the first 1K bytes of memory.
In order to handle interrupts from a given device, we must install an
interrupt handler at the corresponding entry in the interrupt vector table.
For example, to handle timer interrupts, which generate an interrupt type
number 08H, we must install a timer interrupt handler at 0000:0020H.